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Charge Sharing Fault Analysis and Testing for CMOS Domino Logic Circuits.

C. Cheng, J. Wang, S. Chang, and W. Jone. LATW, page 59-64. IEEE, (2000)

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Hugh Jones

Josef Edgar Jonek

Martina Jonen

Lars Jonetz-Mentzel

Stefan Joneleit

Other publications of authors with the same name

A coordinated circuit partitioning and test generation method for pseudo-exhaustive testing of VLSI circuits.W. Jone, and C. Papachristou. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 14 (3): 374-384 (1995)Delay Fault Coverage Enhancement Using Variable Observation Times.W. Jone, Y. Ho, and S. Das. J. Electron. Test., 11 (2): 131-146 (1997)Pseudorandom test-length analysis using differential solutions.D. Li, and W. Jone. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 15 (7): 815-825 (1996)Fault Modeling and Detection for Drowsy SRAM Caches.W. Pei, W. Jone, and Y. Hu. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 26 (6): 1084-1100 (2007)Defect Level Estimation for Pseudorandom Testing Using Stochastic Analysis.W. Jone, D. Huang, S. Chang, and S. Das. VLSI Design, 12 (4): 457-474 (2001)Fault simulation and response compaction in full scan circuits using HOPE.S. Das, C. Ramamoorthy, M. Assaf, E. Petriu, W. Jone, and M. Sahinoglu. IEEE Trans. Instrumentation and Measurement, 54 (6): 2310-2328 (2005)High-Performance Deadlock-Free ID Assignment for Advanced Interconnect Protocols.H. Chou, Y. Chen, K. Yang, J. Tsao, S. Chang, W. Jone, and T. Chen. IEEE Trans. Very Large Scale Integr. Syst., 24 (3): 1169-1173 (2016)Turbo1500: Core-Based Design for Test and Diagnosis.L. Wang, R. Apte, S. Wu, B. Sheu, W. Jone, J. Guo, K. Lee, W. Wang, X. Wen, H. Chao and 5 other author(s). IEEE Des. Test Comput., 26 (1): 26-35 (2009)On random testing for combinational circuits with a high measure of confidence.S. Das, and W. Jone. IEEE Trans. Syst. Man Cybern., 22 (4): 748-754 (1992)DyXY: a proximity congestion-aware deadlock-free dynamic routing method for network on chip.M. Li, Q. Zeng, and W. Jone. DAC, page 849-852. ACM, (2006)

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Disambiguation of "Jone, Wen-Ben"

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Charge Sharing Fault Analysis and Testing for CMOS Domino Logic Circuits.

Please choose a person to relate this publication to

Hugh Jones

Josef Edgar Jonek

Martina Jonen

Lars Jonetz-Mentzel

Stefan Joneleit

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Jone, Wen-Ben"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Charge Sharing Fault Analysis and Testing for CMOS Domino Logic Circuits.

Please choose a person to relate this publication to

Hugh Jones

Josef Edgar Jonek

Martina Jonen

Lars Jonetz-Mentzel

Stefan Joneleit

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Charge Sharing Fault Analysis and Testing for CMOS Domino Logic Circuits.