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Subword Parallel Architecture for Connected Component Labeling and Morphological Operations., and . APCCAS, page 936-939. IEEE, (2006)Partial-result-reuse architecture and its design technique for morphological operations with flat structuring elements., , and . IEEE Trans. Circuits Syst. Video Techn., 15 (9): 1156-1169 (2005)A hardware accelerator for video segmentation using programmable morphology PE array., , and . ISCAS (4), page 341-344. IEEE, (2002)Enhanced temporal error concealment algorithm with edge-sensitive processing order., , , and . ISCAS, page 3466-3469. IEEE, (2008)Fast disparity estimation algorithm for mesh-based stereo image/video compression with two-stage hybrid approach., , , , and . VCIP, volume 5150 of Proceedings of SPIE, page 1521-1530. SPIE, (2003)Distributed video codec with spatiotemporal side information., , , , and . ISCAS, page 1-4. IEEE, (2017)Learning a Code-Space Predictor by Exploiting Intra-Image-Dependencies., , , and . BMVC, page 124. BMVA Press, (2018)Architecture Design of Fine Grain Quality Scalable Encoder with CABAC for H.264/AVC Scalable Extension., , , , and . J. Signal Process. Syst., 60 (3): 363-375 (2010)Computation-Performance Optimization of Convolutional Neural Networks With Redundant Filter Removal., , , , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 66-I (5): 1908-1921 (2019)A Novel Gaming Video Encoding Process Using In-Game Motion Vectors., , and . IEEE Trans. Circuits Syst. Video Techn., 30 (7): 2207-2214 (2020)