( en | de | ru )

 

Disambiguation

From post

копироватьудалитьдобавить публикацию в буфер
Measuring and Exploiting Guardbands of Server-Grade ARMv8 CPU Cores and DRAMs.

, , , , , , , , , , , и . DSN Workshops, стр. 6-9. IEEE Computer Society, (2018)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed.

Evripidis Papadimitriou

Georg Papadimitriou

Sofia Papadimitriou

Joannis Papadimitriou

Dimitra Papadimitriou

 

Другие публикации лиц с тем же именем

Exceeding Conservative Limits: A Consolidated Analysis on Modern Hardware Margins., , , , , , , и . CoRR, (2020)Measuring the impact of burst buffers on data-intensive scientific workflows., , , , и . Future Gener. Comput. Syst., (2019)Towards Accurate Performance Modeling of RISC-V Designs., , , и . CoRR, (2021)Statistical Analysis of Multicore CPUs Operation in Scaled Voltage Conditions., , , и . IEEE Comput. Archit. Lett., 17 (2): 109-112 (2018)Soft Error Effects on Arm Microprocessors: Early Estimations Versus Chip., , , , и . Computer, 56 (7): 4-6 (2023)The Evolution of the Pegasus Workflow Management Software., , , , , , и . Comput. Sci. Eng., 21 (4): 22-36 (2019)Fair sharing of network resources among workflow ensembles., , , , , , , , , и . Clust. Comput., 25 (4): 2873-2891 (2022)gpuFI-4: A Microarchitecture-Level Framework for Assessing the Cross-Layer Resilience of Nvidia GPUs., , и . ISPASS, стр. 35-45. IEEE, (2022)Characterizing Soft Error Vulnerability of CPUs Across Compiler Optimizations and Microarchitectures., и . IISWC, стр. 113-124. IEEE, (2021)Boosting Microprocessor Efficiency: Circuit- and Workload-Aware Assessment of Timing Errors., , , и . IISWC, стр. 125-137. IEEE, (2021)