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ReDCIM: Reconfigurable Digital Computing- In -Memory Processor With Unified FP/INT Pipeline for Cloud AI Acceleration.

, , , , , , , , , and . IEEE J. Solid State Circuits, 58 (1): 243-255 (2023)

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Battery aware tasks allocating algorithm for multi-battery operated system., , , and . APCCAS, page 875-878. IEEE, (2010)A Fast-locking and Wide-range Reversible SAR DLL., , and . ISCAS, page 992-995. IEEE, (2009)A high efficient baseband transceiver for IEEE 802.15.4 LR-WPAN systems., , , , and . ASICON, page 224-227. IEEE, (2011)A reconfigurable multi-processor SoC for media applications., , , , , and . ISCAS, page 2011-2014. IEEE, (2010)An uneven-dual-core processor based mobile platform for facilitating the collaboration among various embedded electronic devices., , , , and . IEEE Trans. Consumer Electronics, 60 (1): 137-145 (2014)Extending lifetime of battery-powered coarse-grained reconfigurable computing platforms., , , and . DATE, page 1-6. European Design and Automation Association, (2014)Breaking the Synchronization Bottleneck with Reconfigurable Transactional Execution., , , , and . IEEE Comput. Archit. Lett., 17 (2): 147-150 (2018)An Ultra-High Energy-Efficient Reconfigurable Processor for Deep Neural Networks with Binary/Ternary Weights in 28NM CMOS., , , , , , and . VLSI Circuits, page 37-38. IEEE, (2018)A Novel Composite Method to Accelerate Control Flow on Reconfigurable Architecture (Abstract Only)., , , , and . FPGA, page 270. ACM, (2015)Data-Flow Graph Mapping Optimization for CGRA With Deep Reinforcement Learning., , , , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 38 (12): 2271-2283 (2019)