%0 Conference Paper %1 conf/vlsic/SunB00P020 %A Sun, Xun %A Boora, Akshat %A Pamula, Rajesh %A Huang, Chi-Hsiang %A Peña-Colaiocco, Diego %A Sathe, Visvesh S. %B VLSI Circuits %D 2020 %I IEEE %K dblp %P 1-2 %T Model Predictive Control of an Integrated Buck Converter for Digital SoC Domains in 65nm CMOS. %U http://dblp.uni-trier.de/db/conf/vlsic/vlsic2020.html#SunB00P020 %@ 978-1-7281-9942-9

@inproceedings{conf/vlsic/SunB00P020, added-at = {2024-10-06T00:00:00.000+0200}, author = {Sun, Xun and Boora, Akshat and Pamula, Rajesh and Huang, Chi-Hsiang and Peña-Colaiocco, Diego and Sathe, Visvesh S.}, biburl = {https://www.bibsonomy.org/bibtex/28fae8fe00eb92f1e58a66c80d61f25ae/dblp}, booktitle = {VLSI Circuits}, crossref = {conf/vlsic/2020}, ee = {https://doi.org/10.1109/VLSICircuits18222.2020.9163012}, interhash = {ec4f85765467948866d194791ec0a04b}, intrahash = {8fae8fe00eb92f1e58a66c80d61f25ae}, isbn = {978-1-7281-9942-9}, keywords = {dblp}, pages = {1-2}, publisher = {IEEE}, timestamp = {2024-10-07T09:45:23.000+0200}, title = {Model Predictive Control of an Integrated Buck Converter for Digital SoC Domains in 65nm CMOS.}, url = {http://dblp.uni-trier.de/db/conf/vlsic/vlsic2020.html#SunB00P020}, year = 2020 }