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Disambiguation of "O'Connor, Ian"

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Emerging Technologies: Challenges and Opportunities for Logic Synthesis.

, , , , , , and . DDECS, page 93-98. IEEE, (2021)

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Daniel O'Connor

Max Iann

Gheorghe Iancu

Enrico Iannone

Nadia Ianeva

 

Other publications of authors with the same name

Guest Editorial: Emerging Technologies and Architectures for Manycore Computing Part 1: Hardware Techniques., , and . IEEE Trans. Multi Scale Comput. Syst., 4 (2): 97-98 (2018)Dependability of Alternative Computing Paradigms for Machine Learning: hype or hope?, , , , , , , and . DDECS, page 7-13. IEEE, (2022)CNTFET Modeling and Reconfigurable Logic-Circuit Design., , , , , , , , , and 2 other author(s). IEEE Trans. Circuits Syst. I Regul. Pap., 54-I (11): 2365-2379 (2007)Exploiting Approximate Computing for Efficient and Reliable Convolutional Neural Networks., , and . ISVLSI, page 326. IEEE, (2022)Cross Layer Design for the Predictive Assessment of Technology-Enabled Architectures., , , , , , , , , and . DATE, page 1-10. IEEE, (2023)Optical look up table., , , , and . DATE, page 873-876. EDA Consortium San Jose, CA, USA / ACM DL, (2013)Optical solutions for system-level interconnect.. SLIP, page 79-88. ACM, (2004)Energy and Performance Trade-off in Nanophotonic Interconnects using Coding Techniques., , , , , and . DAC, page 85:1-85:6. ACM, (2017)Mapping method of reconfigurable cell matrices based on nanoscale devices using inter-stage fixed interconnection scheme., , , , and . ICECS, page 888-891. IEEE, (2009)Logic cells and interconnect strategies for nanoscale reconfigurable computing fabrics., , , , , , and . ICECS, page 66-69. IEEE, (2010)