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Disambiguation of "Koide, Tetsushi"

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Efficient Vertical/Horizontal-Space 1D-DCT Processing Based on Massive-Parallel Matrix-Processing Engine.

, , , , , , , and . ISCAS, page 525-528. IEEE, (2007)

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Tetsushi Hirano

Tetsushi Harada

 

Other publications of authors with the same name

Unified Data/Instruction Cache with Hierarchical Multi-Port Architecture and Hidden Precharge Pipeline., , , , , and . APCCAS, page 1297-1300. IEEE, (2006)An MCM Routing Algorithm Considering Crosstalk., , , and . ISCAS, page 211-214. IEEE, (1995)FPGA implementation of type identifier for colorectal endoscopie images with NBI magnification., , , , , , , , , and 3 other author(s). APCCAS, page 651-654. IEEE, (2014)Implementation of Computer-Aided Diagnosis System on Customizable DSP Core for Colorectal Endoscopic Images with CNN Features and SVM., , , , , , , , , and 3 other author(s). TENCON, page 1663-1666. IEEE, (2018)A Timing-Driven Global Routing Algorithm with Pin Assignment, Block Reshaping, and Positioning for Building Block Layout., and . ASP-DAC, page 577-583. IEEE, (1998)Image segmentation of pyramid style identifier based on Support Vector Machine for colorectal endoscopic images., , , , , , , , , and 2 other author(s). EMBC, page 2997-3000. IEEE, (2015)An IoT-gateway with the information-centric communication., , , , and . ISDCS, page 1-3. IEEE, (2019)Efficient Video-Picture Segmentation Algorithm for Cell-Network-Based Digital CMOS Implementation., , , and . IEICE Trans. Inf. Syst., 87-D (2): 500-503 (2004)Acceleration of DCT Processing with Massive-Parallel Memory-Embedded SIMD Matrix Processor., , , , , , , , and . IEICE Trans. Inf. Syst., 90-D (8): 1312-1315 (2007)Real-Time Huffman Encoder with Pipelined CAM-Based Data Path and Code-Word-Table Optimizer., , , , , , , , and . IEICE Trans. Inf. Syst., 90-D (1): 334-345 (2007)