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Disambiguation of "Molahosseini, Amir Sabbagh"

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Area-delay-power-aware adder placement method for RNS reverse converter design.

, , , , and . LASCAS, page 223-226. IEEE, (2016)

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Jamill Sabbagh

Joseph Sabbagh

Abdulkarim Sabbagh

Ayman Sabbagh

Bakir Sabbagh

 

Other publications of authors with the same name

Image processing with high-speed and low-energy approximate arithmetic circuit., , , and . Sustain. Comput. Informatics Syst., (2022)Area-delay-power-aware adder placement method for RNS reverse converter design., , , , and . LASCAS, page 223-226. IEEE, (2016)Comparison of modular numbers based on the chinese remainder theorem with fractional values., , , , , and . Autom. Control. Comput. Sci., 49 (6): 354-365 (2015)Half-Precision Floating-Point Formats for PageRank: Opportunities and Challenges., and . HPEC, page 1-7. IEEE, (2020)A Reduced-Area Reverse Converter for the Moduli Set 2n, 2n-1, 22n-1-1., , , and . Int. J. Adv. Comp. Techn., 2 (5): 61-65 (2010)Variable Latency Carry Speculative Adders with Input-based Dynamic Configuration., , , and . Comput. Electr. Eng., (2021)Residue-to-binary conversion for general moduli sets based on approximate Chinese remainder theorem., , , , and . Int. J. Comput. Math., 94 (9): 1833-1849 (2017)An improved reverse converter for the moduli set 2n-1, 2n, 2n+1, 2n+1-1., , and . IEICE Electron. Express, 5 (17): 672-677 (2008)Low-Precision Floating-Point Formats: From General-Purpose to Application-Specific., , , and . Approximate Computing, Springer International Publishing, (2022)New energy-efficient hybrid wide-operand adder architecture., , , and . IET Circuits Devices Syst., 13 (8): 1221-1231 (2019)