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Disambiguation of "Sousa, Leonel"

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Area-delay-power-aware adder placement method for RNS reverse converter design.

, , , , and . LASCAS, page 223-226. IEEE, (2016)

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Leonel Tedesco

Gideon Sousa

Carlos Sousa

Ágabo Borges de Sousa

Maria Constança Dias Urbano Sousa

 

Other publications of authors with the same name

An improved RNS generator 2n +/- k based on threshold logic., , , and . VLSI-SoC, page 119-124. IEEE, (2010)A tutorial overview on the properties of the discrete cosine transform for encoded image and video processing., and . Signal Process., 91 (11): 2443-2464 (2011)Fast transcoding architectures for insertion of non-regular shaped objects in the compressed DCT-domain., and . Signal Process. Image Commun., 18 (8): 659-683 (2003)Accelerating the phylogenetic parsimony function on heterogeneous systems., , , and . Concurr. Comput. Pract. Exp., (2017)Towards the Integration of Reverse Converters into the RNS Channels., , , and . IEEE Trans. Computers, 69 (3): 342-348 (2020)Multiobjective Frog-Leaping Optimization for the Study of Ancestral Relationships in Protein Data., , and . IEEE Trans. Evol. Comput., 22 (6): 879-893 (2018)RNS Reverse Converters for Moduli Sets With Dynamic Ranges up to (8n+1)-bit., , and . IEEE Trans. Circuits Syst. I Regul. Pap., 60-I (6): 1487-1500 (2013)MRC-Based RNS Reverse Converters for the Four-Moduli Sets 2n+1, 2n-1, 2n, 22n+1-1 and 2n+1, 2n-1, 22n, 22n+1-1., and . IEEE Trans. Circuits Syst. II Express Briefs, 59-II (4): 244-248 (2012)Randomised multi-modulo residue number system architecture for double-and-add to prevent power analysis side channel attacks., , , and . IET Circuits Devices Syst., 7 (5): 283-293 (2013)Multicore Parallelism Exploration Targeting 3D-HEVC Intra-Frame Prediction., , , , , and . IEEE Des. Test, 37 (3): 15-21 (2020)