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Image processing with high-speed and low-energy approximate arithmetic circuit.

, , , and . Sustain. Comput. Informatics Syst., (2022)

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Image processing with high-speed and low-energy approximate arithmetic circuit., , , and . Sustain. Comput. Informatics Syst., (2022)Area-delay-power-aware adder placement method for RNS reverse converter design., , , , and . LASCAS, page 223-226. IEEE, (2016)Comparison of modular numbers based on the chinese remainder theorem with fractional values., , , , , and . Autom. Control. Comput. Sci., 49 (6): 354-365 (2015)Half-Precision Floating-Point Formats for PageRank: Opportunities and Challenges., and . HPEC, page 1-7. IEEE, (2020)A new four-modulus RNS to binary converter., , and . ISCAS, page 4161-4164. IEEE, (2010)A fault-tolerant architecture for internet-of-things based on software-defined networks., , and . Telecommun. Syst., 77 (1): 155-169 (2021)A Reverse Converter for the Enhanced Moduli Set 2n-1, 2n+1, 22n, 22n+1-1 Using CRT and MRC., and . ISVLSI, page 456-457. IEEE Computer Society, (2010)RNS reverse converters for moduli sets with dynamic ranges of 9n-bit., , and . LASCAS, page 143-146. IEEE, (2016)Towards Efficient Modular Adders based on Reversible Circuits., , , and . ISCAS, page 1-5. IEEE, (2018)A Multifunctional Unit For Reverse Conversion and Sign Detection Based on The 5-Moduli Set., , and . Comput. Sci., (2021)