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Disambiguation of "Leupers, Rainer"

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SoftFlow: Automated HW-SW Confidentiality Verification for Embedded Processors.

, , , , and . VLSI-SoC, page 1-6. IEEE, (2023)

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To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Rainer Leupers

Rainer Leupers

Rainer Leupers

Rainer Melzer

Multimerisierung und DNA-Bindung homöotischer Proteine der Blütenbildung. Uni Jena, (2009)

Rainer Nustede

In-vitro-Proliferationsverhalten pädiatrischer Tumorzelllinien nach zweistündiger Exposition mit Kohlenstoffdioxid, Helium und Raumluft. MedH Hannover, (2009)
 

Other publications of authors with the same name

Optimized Communication Architecture of MPSoCs with a Hardware Scheduler: A System-Level Analysis., , , , , , and . Int. J. Embed. Real Time Commun. Syst., 2 (3): 1-20 (2011)AMAIX: A Generic Analytical Model for Deep Learning Accelerators., , , , and . SAMOS, volume 12471 of Lecture Notes in Computer Science, page 36-51. Springer, (2020)Modelling Machine Learning Components for Mapping and Scheduling of AUTOSAR Runnables., , and . ISSRE, page 127-137. IEEE, (2020)Software Compilation Techniques for MPSoCs., , and . Handbook of Signal Processing Systems, Springer, (2010)Enhanced structural analysis for C code reconstruction from IR code., , , , and . SCOPES, page 21-27. ACM, (2011)Trends in embedded software synthesis., , and . ICSAMOS, page 347-354. IEEE, (2011)Extraction of Kahn Process Networks from While Loops in Embedded Software., , , , and . HPCC/CSS/ICESS, page 1078-1085. IEEE, (2015)Combined MPSoC Task Mapping and Memory Optimization for Low-Power., , , and . APCCAS, page 121-124. IEEE, (2019)Extraction of recursion level parallelism for embedded multicore systems., , , and . SAMOS, page 154-162. IEEE, (2017)Architecture, Dataflow and Physical Design Implications of 3D-ICs for DNN-Accelerators., , , , , , and . CoRR, (2020)