Author of the publication

Design Considerations of Scaled Sub-0.1 ?m PD/SOI CMOS Circuits.

, , , and . ISQED, page 153-158. IEEE Computer Society, (2003)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Minimizing power with flexible voltage islands., , and . ISCAS (1), page 21-24. IEEE, (2005)From milliwatts to megawatts: system level power challenge., , , , , , , and . DAC, page 750-751. ACM, (2009)5.1 POWER8TM: A 12-core server-class processor in 22nm SOI with 7.6Tb/s off-chip bandwidth., , , , , , , , , and 10 other author(s). ISSCC, page 96-97. IEEE, (2014)Keynote talk: Opportunities and challenges for high performance microprocessor designs and design automation.. VLSI Design, IEEE Computer Society, (2013)Wire density driven global routing for CMP variation and timing., , , and . ICCAD, page 487-492. ACM, (2006)Logic optimization by output phase assignment in dynamic logic synthesis., , and . ICCAD, page 2-7. IEEE Computer Society / ACM, (1996)Area Efficient Synthesis of Asynchronous Interface Circuits., and . ICCD, page 212-216. IEEE Computer Society, (1994)Searching for a minimal finite state automaton (FSA)., and . ICTAI, page 416-423. IEEE Computer Society, (1991)Qiskit Code Assistant: Training LLMs for generating Quantum Computing Code., , , , , , , and . CoRR, (2024)SOI Digital CMOS VLSI - a Design Perspective., and . DAC, page 709-714. ACM Press, (1999)