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A 28nm Nonvolatile AI Edge Processor using 4Mb Analog-Based Near-Memory-Compute ReRAM with 27.2 TOPS/W for Tiny AI Edge Devices.

T. Wen, J. Hung, H. Hsu, Y. Wu, F. Chang, C. Li, C. Chien, C. Su, W. Khwa, J. Wu, C. Lo, R. Liu, C. Hsieh, K. Tang, M. Ho, Y. Chih, T. Chang, and M. Chang. VLSI Technology and Circuits, page 1-2. IEEE, (2023)

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Shu Ching Ho

Franz Mon

Lijin Shu

Shu Zhang

Pham gia Mon

Other publications of authors with the same name

A 2-GHz Direct Digital Frequency Synthesizer Based on LUT and Rotation.Y. Yang, Z. Wang, P. Yang, M. Chang, M. Ho, H. Yang, and Y. Liu. ISCAS, page 1-5. IEEE, (2018)Considerations Of Integrating Computing-In-Memory And Processing-In-Sensor Into Convolutional Neural Network Accelerators For Low-Power Edge Devices.K. Tang, W. Wei, Z. Yeh, T. Hsu, Y. Chiu, C. Xue, Y. Kuo, T. Wen, M. Ho, C. Lo and 3 other author(s). VLSI Circuits, page 166-. IEEE, (2019)A 260mV L-shaped 7T SRAM with bit-line (BL) Swing expansion schemes based on boosted BL, asymmetric-VTH read-port, and offset cell VDD biasing techniques.M. Chen, L. Chen, M. Chang, S. Yang, Y. Kuo, J. Wu, M. Ho, H. Su, Y. Chu, W. Wu and 2 other author(s). VLSIC, page 112-113. IEEE, (2012)Read circuits for resistive memory (ReRAM) and memristor-based nonvolatile Logics.M. Chang, A. Lee, C. Lin, M. Ho, P. Chen, C. Kuo, M. Chen, P. Tseng, T. Ku, C. Chen and 2 other author(s). ASP-DAC, page 569-574. IEEE, (2015)Challenges of emerging memory and memristor based circuits: Nonvolatile logics, IoT security, deep learning and neuromorphic computing.C. Dou, W. Chen, Y. Chen, H. Lin, W. Lin, M. Ho, and M. Chang. ASICON, page 140-143. IEEE, (2017)A low-power subthreshold-to-superthreshold level-shifter for sub-0.5V embedded resistive RAM (ReRAM) macro in ultra low-voltage chips.M. Chang, C. Wu, J. Hung, Y. King, C. Lin, M. Ho, C. Kuo, and S. Sheu. APCCAS, page 695-698. IEEE, (2014)A 28nm Nonvolatile AI Edge Processor using 4Mb Analog-Based Near-Memory-Compute ReRAM with 27.2 TOPS/W for Tiny AI Edge Devices.T. Wen, J. Hung, H. Hsu, Y. Wu, F. Chang, C. Li, C. Chien, C. Su, W. Khwa, J. Wu and 8 other author(s). VLSI Technology and Circuits, page 1-2. IEEE, (2023)RRAM-based 7T1R nonvolatile SRAM with 2x reduction in store energy and 94x reduction in restore energy for frequent-off instant-on applications.A. Lee, M. Chang, C. Lin, C. Chen, M. Ho, C. Kuo, P. Tseng, S. Sheu, and T. Ku. VLSIC, page 76-. IEEE, (2015)

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Disambiguation of "Ho, Mon-Shu"

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A 28nm Nonvolatile AI Edge Processor using 4Mb Analog-Based Near-Memory-Compute ReRAM with 27.2 TOPS/W for Tiny AI Edge Devices.

Please choose a person to relate this publication to

Shu Ching Ho

Franz Mon

Lijin Shu

Shu Zhang

Pham gia Mon

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Ho, Mon-Shu"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A 28nm Nonvolatile AI Edge Processor using 4Mb Analog-Based Near-Memory-Compute ReRAM with 27.2 TOPS/W for Tiny AI Edge Devices.

Please choose a person to relate this publication to

Shu Ching Ho

Franz Mon

Lijin Shu

Shu Zhang

Pham gia Mon

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

A 28nm Nonvolatile AI Edge Processor using 4Mb Analog-Based Near-Memory-Compute ReRAM with 27.2 TOPS/W for Tiny AI Edge Devices.