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ORION 2.0: A Power-Area Simulator for Interconnection Networks., , , и . IEEE Trans. Very Large Scale Integr. Syst., 20 (1): 191-196 (2012)Full Chip Impact Study of Power Delivery Network Designs in Gate-Level Monolithic 3-D ICs., , , , и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 36 (6): 992-1003 (2017)BEOL stack-aware routability prediction from placement using data mining techniques., , , , и . ICCD, стр. 41-48. IEEE Computer Society, (2016)Improved on-chip router analytical power and area modeling., , и . ASP-DAC, стр. 241-246. IEEE, (2010)GANAX: A Unified MIMD-SIMD Acceleration for Generative Adversarial Networks., , , и . ISCA, стр. 650-661. IEEE Computer Society, (2018)SnaPEA: Predictive Early Activation for Reducing Computation in Deep Convolutional Neural Networks., , , , и . ISCA, стр. 662-673. IEEE Computer Society, (2018)Quantified Impacts of Guardband Reduction on Design Process Outcomes., , и . ISQED, стр. 790-797. IEEE Computer Society, (2008)Test-TSV estimation during 3D-IC partitioning., , и . 3DIC, стр. 1-7. IEEE, (2013)Placement-driven partitioning for congestion mitigation in monolithic 3D IC designs., , , и . ISPD, стр. 47-54. ACM, (2014)Efficient trace-driven metaheuristics for optimization of networks-on-chip configurations., , , и . ICCAD, стр. 256-263. IEEE, (2010)