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True Random Number Generator based on Voltage-Gated Spintronic structure., и . VLSID, стр. 377-382. IEEE, (2023)SkipCache: application aware cache management for chip multi-processors., , и . IET Comput. Digit. Tech., 9 (6): 293-299 (2015)2L-2D Routing for Buffered Mesh Network-on-Chip., , , , , и . VDAT, том 1066 из Communications in Computer and Information Science, стр. 308-320. Springer, (2019)SkipCache: miss-rate aware cache management., , и . PACT, стр. 481-482. ACM, (2012)Evaluation of Bit Manipulation Instructions in Optimization of Size and Speed in RISC-V., , , и . VLSID, стр. 54-59. IEEE, (2021)An Application-Aware Cache Replacement Policy for Last-Level Caches., , и . ARCS, том 7767 из Lecture Notes in Computer Science, стр. 207-219. Springer, (2013)SAMO: store aware memory optimizations., , и . Conf. Computing Frontiers, стр. 33:1-33:10. ACM, (2014)Way Sharing Set Associative Cache Architecture., , , и . VLSI Design, стр. 251-256. IEEE Computer Society, (2012)