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SLMLET: A RISC-V Processor SoC with Tightly-Coupled Area-Efficient eFPGA Blocks.

, , , , , и . COOL CHIPS, стр. 1-6. IEEE, (2024)

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Masahiro Noguchi

Masahiro Ogawa

Ajumi Iida

Takashi Iida

Masahiro Yoshida

 

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A novel FPGA design framework with VLSI post-routing performance analysis (abstract only)., , , , , и . FPGA, стр. 271. ACM, (2013)An Embedded Reconfigurable IP Core with Variable Grain Logic Cell Architecture., , , , и . Int. J. Reconfigurable Comput., (2008)An Easily Testable Routing Architecture and Efficient Test Technique., , , , и . FPL, стр. 291-294. IEEE Computer Society, (2011)FPL Demo: An FPGA-IP Prototype Chip for MEC devices., , и . FPL, стр. 467. IEEE, (2022)Image Search System Based on Feature Vectors of Convolutional Neural Network., , и . TENCON, стр. 934-939. IEEE, (2020)Improving the Soft-error Tolerability of a Soft-core Processor on., , , , и . J. Next Gener. Inf. Technol., 2 (3): 35-48 (2011)Evaluation of fault tolerant technique based on homogeneous FPGA architecture., , , , , и . VLSI-SoC, стр. 225-230. IEEE, (2012)A heuristic method of generating diameter 3 graphs for order/degree problem (invited paper)., и . NOCS, стр. 1-6. IEEE, (2016)Design Methodology.. Principles and Structures of FPGAs, Springer, (2018)A 3D FPGA Architecture to Realize Simple Die Stacking., , , , и . Inf. Media Technol., 10 (3): 425-431 (2015)