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Design of double-sampling ΣΔ modulation A/D converters with bilinear integrators.

, , and . IEEE Trans. Circuits Syst. I Regul. Pap., 52-I (4): 715-722 (2005)

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An Unconstrained Architecture for High-Order Sigma Delta Force-Feedback Inertial Sensors., , and . ISCAS, page 3063-3066. IEEE, (2007)Design of double-sampling ΣΔ modulation A/D converters with bilinear integrators., , and . IEEE Trans. Circuits Syst. I Regul. Pap., 52-I (4): 715-722 (2005)A 250-kHz 94-dB double-sampling ΣΔ modulation A/D converter with a modified noise transfer function., , and . IEEE J. Solid State Circuits, 38 (10): 1657-1662 (2003)A 13.5-b 1.2-V micropower extended counting A/D converter., , and . IEEE J. Solid State Circuits, 36 (2): 176-183 (2001)An On-Line Calibration Technique for Mismatch Errors in High-Speed DACs., , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 55-I (7): 1873-1883 (2008)A 25 Gb/s All-Digital Clock and Data Recovery Circuit for Burst Mode Applications in PONs., , , , , and . ECOC, page 1-3. IEEE, (2017)An anti-aliasing filter inspired by continuous-time ΔΣ modulation., , , and . ICECS, page 854-857. IEEE, (2008)Why and How VCO-based ADCs can improve instrumentation applications., , and . ICECS, page 101-104. IEEE, (2018)A Current-Mode Floating-Bridge Technique for Closed-Loop ΣΔ Readout of Wheatstone Bridge Sensors., and . ISCAS, page 1-5. IEEE, (2019)Calibration of DAC Mismatch Errors in ΣΔ ADCs Based on a Sine-Wave Measurement., , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 60-II (9): 567-571 (2013)