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Power Optimization of a 0.5V 0.286-to-18MHz ADPLL in 65nm CMOS Process.

, , , , , , , , , и . NGCAS, стр. 70-73. IEEE, (2018)

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John E Blyth

Richard -E Moes

John A. E. Anderson University of Toronto

Richard John Teuscher

John Richard Morton Gledhill

 

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