( en | de | ru )

 

Disambiguation of "Annamalai, Arunachalam"

Author of the publication

copydeleteadd this publication to your clipboard
On dynamic polymorphing of a superscalar core for improving energy efficiency.

, , , , and . ICCD, page 495-498. IEEE Computer Society, (2013)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Arunachalam Narayanan

Vinayagam Arunachalam

Raghu Arunachalam

Manonmani Arunachalam

Arunachalam Venkatachalam

 

Other publications of authors with the same name

A study on polymorphing superscalar processor dynamically to improve power efficiency., , , , and . ISVLSI, page 46-51. IEEE Computer Socity, (2013)Dynamic Thread Scheduling in Asymmetric Multicores to Maximize Performance-per-Watt., , , and . IPDPS Workshops, page 964-971. IEEE Computer Society, (2012)On dynamic polymorphing of a superscalar core for improving energy efficiency., , , , and . ICCD, page 495-498. IEEE Computer Society, (2013)Reducing Energy per Instruction via Dynamic Resource Allocation and Voltage and Frequency Adaptation in Asymmetric Multicores., , , and . ISVLSI, page 436-441. IEEE Computer Society, (2014)Performance Per Watt Benefits of Dynamic Core Morphing in Asymmetric Multicores., , , , and . PACT, page 121-130. IEEE Computer Society, (2011)A system-level solution for managing spatial temperature gradients in thinned 3D ICs., , , and . ISQED, page 88-95. IEEE, (2013)An opportunistic prediction-based thread scheduling to maximize throughput/watt in AMPs., , , and . PACT, page 63-72. IEEE Computer Society, (2013)Scalable Thread Scheduling in Asymmetric Multicores for Power Efficiency., , , and . SBAC-PAD, page 59-66. IEEE Computer Society, (2012)