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Adaptive Test-Time Augmentation for Low-Power CPU., , , , and . CoRR, (2021)Design and Characterization of Analog-to-Digital Converters using Graphene P-N Junctions., , , , and . ACM Great Lakes Symposium on VLSI, page 253-258. ACM, (2015)Approximate Error Detection-Correction for efficient Adaptive Voltage Over-Scaling., , and . Integr., (2018)AdapTTA: Adaptive Test-Time Augmentation for Reliable Embedded ConvNets., , , , and . VLSI-SoC, page 1-6. IEEE, (2021)Beyond Ideal DVFS Through Ultra-Fine Grain Vdd-Hopping., , , , and . VLSI-SoC (Selected Papers), volume 508 of IFIP Advances in Information and Communication Technology, page 152-172. Springer, (2016)Inference on the Edge: Performance Analysis of an Image Classification Task Using Off-The-Shelf CPUs and Open-Source ConvNets., , , and . SNAMS, page 454-459. IEEE, (2019)Tunable Error Detection-Correction for Efficient Adaptive Voltage Over-Scaling., and . NGCAS, page 13-16. IEEE, (2017)On the Efficiency of AdapTTA: An Adaptive Test-Time Augmentation Strategy for Reliable Embedded ConvNets., , , , and . VLSI-SoC (Selected Papers), volume 661 of IFIP Advances in Information and Communication Technology, page 1-23. Springer, (2021)On the Efficiency of Early Bird Sampling (EBS) an Error Detection-Correction Scheme for Data-Driven Voltage Over-Scaling., , , and . VLSI-SoC (Selected Papers), volume 500 of IFIP Advances in Information and Communication Technology, page 153-177. Springer, (2017)Energy-Accuracy Scaling in Digital ICs: Static and Adaptive Design Methods and Tools.. Polytechnic University of Turin, Italy, (2019)