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Disambiguation of "Tang, Wai-Chung"

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FPGA technology mapping optimization by rewiring algorithms.

, , , and . ISCAS (6), page 5653-5656. IEEE, (2005)

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Chung-wai Chiu

Sin-Chung Tang

Man-Chung Tang

Tang Tang

Wai Chow

 

Other publications of authors with the same name

Further Improve Excellent Graph-Based FPGA Technology Mapping by Rewiring., , and . ISCAS, page 1049-1052. IEEE, (2007)On applying erroneous clock gating conditions to further cut down power., , , and . ASP-DAC, page 509-514. IEEE, (2011)ECO timing optimization with negotiation-based re-routing and logic re-structuring using spare cells., , , and . ASP-DAC, page 511-516. IEEE, (2012)A Quantitative Study of the Routing Architecture Exploring Routing Locality Property for Better Performance and Routability., , and . ERSA, page 116-121. CSREA Press, (2008)Mountain-mover: An intuitive logic shifting heuristic for improving timing slack violating paths., , , , and . ASP-DAC, page 350-355. IEEE, (2013)ECR: A Powerful and Low-Complexity Error Cancellation Rewiring Scheme., , , and . ACM Trans. Design Autom. Electr. Syst., 17 (4): 50:1-50:21 (2012)A scalable routability-driven analytical placer with global router integration for FPGAs (abstract only)., , and . FPGA, page 242. ACM, (2014)Grid-to-ports clock routing for high performance microprocessor designs., , , and . ISPD, page 21-28. ACM, (2011)FPGA technology mapping optimization by rewiring algorithms., , , and . ISCAS (6), page 5653-5656. IEEE, (2005)Improving FPGA designs with incremental logic resynthesis and shortcut-based routing architecture.. Chinese University of Hong Kong, Hong Kong, (2008)ndltd.org (oai:cuhk-dr:cuhk_344308).