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Further Improve Excellent Graph-Based FPGA Technology Mapping by Rewiring.

, , and . ISCAS, page 1049-1052. IEEE, (2007)

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To Detect, Locate, and Mask Hardware Trojans in digital circuits by reverse engineering and functional ECO., , and . ASP-DAC, page 623-630. IEEE, (2016)On Fixed Edges and Edge-Reconstruction of Series-Parallel Networks., , and . Graphs Comb., 17 (2): 213-225 (2001)FPGA technology mapping optimization by rewiring algorithms., , , and . ISCAS (6), page 5653-5656. IEEE, (2005)Improving redundancy addition and removal using unreachable states for sequential circuits., , and . ISCAS, page 3172-3175. IEEE, (2010)IBAW: an implication-tree based alternative-wiring logic transformation algorithm., , and . ASP-DAC, page 415-422. ACM, (2000)Circuit partitioning with coupled logic restructuring techniques., , and . ASP-DAC, page 655-660. ACM, (2000)Reliability Analysis of Self-Repairable MEMS Accelerometer., , and . DFT, page 236-244. IEEE Computer Society, (2006)Scan-Based BIST Using an Improved Scan Forest Architecture., , , and . Asian Test Symposium, page 88-93. IEEE Computer Society, (2004)The exact channel density and compound design for generic universal switch blocks., , , and . ACM Trans. Design Autom. Electr. Syst., 12 (2): 19 (2007)A Quantitative Study of the Routing Architecture Exploring Routing Locality Property for Better Performance and Routability., , and . ERSA, page 116-121. CSREA Press, (2008)