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Investigation and optimization of monolithic 3D logic circuits and SRAM cells considering interlayer coupling., , , , и . ISCAS, стр. 1130-1133. IEEE, (2014)Independently-Controlled-Gate FinFET Schmitt Trigger Sub-Threshold SRAMs., , , , и . IEEE Trans. Very Large Scale Integr. Syst., 20 (7): 1201-1210 (2012)Ultra-low voltage mixed TFET-MOSFET 8T SRAM cell., , , , и . ISLPED, стр. 255-258. ACM, (2014)A comparative analysis of tunneling FET circuit switching characteristics and SRAM stability and performance., , , , , , и . ESSDERC, стр. 157-160. IEEE, (2012)Impacts of NBTI and PBTI on ultra-thin-body GeOI 6T SRAM cells., , , и . ISCAS, стр. 601-604. IEEE, (2015)Evaluation of TFET and FinFET devices and 32-Bit CLA circuits considering work function variation and line-edge roughness., , , , , и . ISCAS, стр. 2325-2328. IEEE, (2015)Analysis of power-performance for ultra-thin-body GeOI logic circuits., , , и . ISLPED, стр. 115-120. IEEE/ACM, (2011)Impacts of random telegraph noise on the analog properties of FinFET and trigate devices and Widlar current source., , , , , , и . ICICDT, стр. 1-4. IEEE, (2012)Impacts of single trap induced random telegraph noise on Si and Ge nanowire FETs, 6T SRAM cells and logic circuits., , , , , и . ICICDT, стр. 61-64. IEEE, (2013)Device design and analysis of logic circuits and SRAMs for Germanium FinFETs on SOI and bulk substrates., , , и . ISQED, стр. 347-352. IEEE, (2013)