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Reconfiguration in FPGA-based multi-core platforms for hard real-time applications.

, , and . ReCoSoC, page 1-8. IEEE, (2016)

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Transitioning to Chisel in University Education: Experiences and Lessons Learned., and . NorCAS, page 1-7. IEEE, (2023)An area-efficient TDM NoC supporting reconfiguration for mode changes., , and . NOCS, page 1-4. IEEE, (2016)Dynamic nsNET2: Efficient Deep Noise Suppression with Early Exiting., , , , , , , , and . MLSP, page 1-6. IEEE, (2023)Interfacing hardware accelerators to a time-division multiplexing network-on-chip., , , and . NORCAS, page 1-4. IEEE, (2015)High-level synthesis for reduction of WCET in real-time systems., , and . NORCAS, page 1-6. IEEE, (2017)A Controller for Dynamic Partial Reconfiguration in FPGA-Based Real-Time Systems., , and . ISORC, page 92-100. IEEE Computer Society, (2017)Reconfiguration in FPGA-based multi-core platforms for hard real-time applications., , and . ReCoSoC, page 1-8. IEEE, (2016)A Time-predictable TTEthenet Node., , , and . ISORC, page 229-233. IEEE, (2019)S4NOC: a minimalistic network-on-chip for real-time multicores., , and . NoCArc@MICRO, page 8:1-8:6. ACM, (2019)Open-Source Chip Design in Academic Education., , , , , , , , , and 5 other author(s). NorCAS, page 1-6. IEEE, (2022)