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Disambiguation of "Asifuzzaman, Kazi"

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Mainstream vs. Emerging HPC: Metrics, Trade-Offs and Lessons Learned.

, , , , , , , , , , and . SBAC-PAD, page 250-257. IEEE, (2018)

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Svetlana Kazitsyna

Ahmad Kazimi

Emmanuel Owden Kazimoto

Julian Kazin

Amin Hasan Kazi

 

Other publications of authors with the same name

HPC Benchmarking: Scaling Right and Looking Beyond the Average., , , , and . Euro-Par, volume 11014 of Lecture Notes in Computer Science, page 135-146. Springer, (2018)Performance and Power Estimation of STT-MRAM Main Memory with Reliable System-level Simulation., , and . ACM Trans. Embed. Comput. Syst., 21 (1): 6:1-6:25 (2022)A Novel Scalable Array Design for III-V Compound Semiconductor-based Nonvolatile Memory (UltraRAM) with Separate Read-Write Paths., , and . ISQED, page 1-7. IEEE, (2023)Enabling a reliable STT-MRAM main memory simulation., , and . MEMSYS, page 283-292. ACM, (2017)Characterizing GPU Energy Usage in Exascale-Ready Portable Science Applications., , , , , , , , , and 1 other author(s). CoRR, (May 2025)Evaluation of STT-MRAM main memory for HPC and real-time systems.. Polytechnic University of Catalonia, Spain, (2019)CMOS-based Single-Cycle In-Memory XOR/XNOR., , , , and . CoRR, (2023)The UP2DATE Baseline Research Platforms., , , , , , , , and . DATE, page 1340-1343. IEEE, (2021)STT-MRAM for real-time embedded systems: performance and WCET implications., , , , and . MEMSYS, page 195-205. ACM, (2019)Mapping Spiking Neural Networks to Heterogeneous Crossbar Architectures using Integer Linear Programming., , , , and . DATE, page 1-7. IEEE, (2025)