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High performance 2D transform hardware for future video coding., , and . IEEE Trans. Consumer Electronics, 63 (2): 117-125 (2017)An HEVC fractional interpolation hardware using memory based constant multiplication., , and . ICCE, page 1-5. IEEE, (2018)A Low Power Versatile Video Coding (VVC) Fractional Interpolation Hardware., , and . DASIP, page 43-47. IEEE, (2018)Efficient Design-Time Flexible Hardware Architecture for Accelerating Homomorphic Encryption., , , , and . VLSI-SoC, page 1-7. IEEE, (2023)ModHE: Modular Homomorphic Encryption Using Module Lattices Potentials and Limitations., , , , , , and . IACR Trans. Cryptogr. Hardw. Embed. Syst., 2024 (1): 527-562 (2024)Low complexity HEVC sub-pixel motion estimation technique and its hardware implementation., , and . ICCE-Berlin, page 159-162. IEEE, (2016)A Unified Cryptoprocessor for Lattice-based Signature and Key-exchange., , , , , , and . IACR Cryptol. ePrint Arch., (2021)A Hardware Accelerator for Polynomial Multiplication Operation of CRYSTALS-KYBER PQC Scheme., , , and . DATE, page 1020-1025. IEEE, (2021)Aloha-HE: A Low-Area Hardware Accelerator for Client-Side Operations in Homomorphic Encryption., , , and . DATE, page 1-6. IEEE, (2024)An FPGA implementation of future video coding 2D transform., , and . ICCE-Berlin, page 31-36. IEEE, (2017)