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5.5GHz system z microprocessor and multi-chip module.

J. Warnock, Y. Chan, H. Harrer, D. Rude, R. Puri, S. Carey, G. Salem, G. Mayer, Y. Chan, M. Mayo, A. Jatkowski, G. Strevig, L. Sigal, A. Datta, A. Gattiker, A. Bansal, D. Malone, T. Strach, H. Wen, P. kin Mak, C. Shum, D. Plass, and C. Webb. ISSCC, page 46-47. IEEE, (2013)

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James D Edwards

James D Mueller

David Warnock

Michael James

Other publications of authors with the same name

Design, CAD and technology challenges for future processors: 3D perspectives.J. Burns, G. Carpenter, E. Kursun, R. Puri, J. Warnock, and M. Scheuermann. DAC, page 212. ACM, (2011)Circuit and Physical Design of the zEnterprise™ EC12 Microprocessor Chips and Multi-Chip Module.J. Warnock, Y. Chan, H. Harrer, S. Carey, G. Salem, D. Malone, R. Puri, J. Zitz, A. Jatkowski, G. Strevig and 15 other author(s). IEEE J. Solid State Circuits, 49 (1): 9-18 (2014)Design-synthesis co-optimisation using skewed and tapered gates.A. Datta, J. Warnock, A. Shukla, S. Gupta, Y. Chan, K. Mohan, and C. Nagarajan. DATE, page 1144-1147. IEEE, (2016)4.1 22nm Next-generation IBM System z microprocessor.J. Warnock, B. Curran, J. Badar, G. Fredeman, D. Plass, Y. Chan, S. Carey, G. Salem, F. Schroeder, F. Malgioglio and 21 other author(s). ISSCC, page 1-3. IEEE, (2015)POWER7TM local clocking and clocked storage elements.J. Warnock, L. Sigal, D. Wendel, K. Muller, J. Friedrich, V. Zyuban, E. Cannon, and A. KleinOsowski. ISSCC, page 178-179. IEEE, (2010)Circuit and PD challenges at the 14nm technology node.J. Warnock. ISPD, page 66-67. ACM, (2013)CMOS scaling in the 0.1-µm, 1.X-volt regime for high-performance applications.G. Shahidi, J. Warnock, J. Comfort, S. Fischer, P. McFarland, A. Acovic, T. Chappell, B. Chappell, T. Ning, C. Anderson and 4 other author(s). IBM J. Res. Dev., 39 (1-2): 229-244 (1995)IBM z13 circuit design and methodology.J. Warnock, C. Berry, M. Wood, L. Sigal, Y. Myung, G. Mayer, M. Mayo, Y. Chan, F. Malgioglio, G. Strevig and 22 other author(s). IBM J. Res. Dev., (2015)Impact of Device Aging on Early Mode Failures in Pulsed Latches.A. Shukla, R. Rao, and J. Warnock. VLSID, page 256-260. IEEE Computer Society, (2018)An elegant hardware-corroborated statistical repair and test methodology for conquering aging effects.R. Kanj, R. Joshi, C. Adams, J. Warnock, and S. Nassif. ICCAD, page 497-504. ACM, (2009)

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Disambiguation of "Warnock, James D."

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5.5GHz system z microprocessor and multi-chip module.

Please choose a person to relate this publication to

James D Edwards

James D Mueller

James D Mueller

David Warnock

Michael James

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Warnock, James D."

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML 5.5GHz system z microprocessor and multi-chip module.

Please choose a person to relate this publication to

James D Edwards

James D Mueller

James D Mueller

David Warnock

Michael James

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
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5.5GHz system z microprocessor and multi-chip module.