( en | de | ru )

 

Disambiguation of "Motomura, Masato"

Author of the publication

copydeleteadd this publication to your clipboard
Hardware-oriented stereo vision algorithm based on 1-D guided filtering and its FPGA implementation.

, , , , , , , , , , and . ICECS, page 169-172. IEEE, (2013)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Masato Ishizaki

Masato Ikuta

Daniele Masato

 

Other publications of authors with the same name

An Embedded DRAM-FPGA Chip with Instantaneous Logic Reconfiguration., , , , and . FCCM, page 264-266. IEEE Computer Society, (1998)Hardware-oriented stereo vision algorithm based on 1-D guided filtering and its FPGA implementation., , , , , , , , , and 1 other author(s). ICECS, page 169-172. IEEE, (2013)Advanced Devices and Architectures., , and . Principles and Structures of FPGAs, Springer, (2018)Edge Inference Engine for Deep & Random Sparse Neural Networks with 4-bit Cartesian-Product MAC Array and Pipelined Activation Aligner., , , , , , and . HCS, page 1-21. IEEE, (2021)Hiddenite: 4K-PE Hidden Network Inference 4D-Tensor Engine Exploiting On-Chip Model Construction Achieving 34.8-to-16.0TOPS/W for CIFAR-100 and ImageNet., , , , , , , , and . ISSCC, page 1-3. IEEE, (2022)Decision Forest Training Accelerator Based on Binary Feature Decomposition., , , , , , and . FCCM, page 215. IEEE, (2023)A Highly Accurate and Parallel Vision MLP FPGA Accelerator based on FP7/8 SIMD Operations., , , , , , and . MCSoC, page 478-485. IEEE, (2023)F3: Beyond the horizon of conventional computing: From deep learning to neuromorphic systems., , , , , and . ISSCC, page 506-508. IEEE, (2017)Foreword., and . VLSI Circuits, page 1-2. IEEE, (2016)Motion-vector estimation and cognitive classification on an image sensor/processor 3D stacked system featuring ThruChip interfaces., , , , , , and . ESSCIRC, page 105-108. IEEE, (2016)