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Disambiguation of "Murray, Kevin E."

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Titan: Enabling large and complex benchmarks in academic CAD.

, , , , and . FPL, page 1-8. IEEE, (2013)

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Alexander Ali Kevin

Kathleen Murray

Konstanze Murray

Bernd Murray

Merit Murray

 

Other publications of authors with the same name

Calculated Risks: Quantifying Timing Error Probability With Extended Static Timing Analysis., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 38 (4): 719-732 (2019)VTR 8: High-performance CAD and Customizable FPGA Architecture Modelling., , , , , , , , , and 5 other author(s). ACM Trans. Reconfigurable Technol. Syst., 13 (2): 9:1-9:55 (2020)Quantifying error: Extending static timing analysis with probabilistic transitions., , , and . DATE, page 1486-1491. IEEE, (2017)Learn to Place: FPGA Placement Using Reinforcement Learning and Directed Moves., , and . FPT, page 85-93. IEEE, (2020)Respect the Difference: Reinforcement Learning for Heterogeneous FPGA Placement., , , , and . ICFPT, page 152-160. IEEE, (2023)Optimizing FPGA Logic Block Architectures for Arithmetic., , , , , , , , , and 2 other author(s). IEEE Trans. Very Large Scale Integr. Syst., 28 (6): 1378-1391 (2020)From Quartus to VPR: Converting HDL to BLIF with the Titan flow., , , , and . FPL, page 1. IEEE, (2013)Tatum: Parallel Timing Analysis for Faster Design Cycles and Improved Optimization., and . FPT, page 110-117. IEEE, (2018)Quantifying the cost and benefit of latency insensitive communication on FPGAs., and . FPGA, page 223-232. ACM, (2014)AIR: A Fast but Lazy Timing-Driven FPGA Router., , and . ASP-DAC, page 338-344. IEEE, (2020)