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Disambiguation of "Jung, Seong-Ook"

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Efficiency analysis of importance sampling in deep submicron STT-RAM design using uncontrollable industry-compatible model parameter.

, , , , and . ICECS, page 400-403. IEEE, (2015)

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Seong-Jung Kim

Ki-Chang Seong

Seunghyeon Seong

Nak-Hyon Seong

Hong-Jae Seong

 

Other publications of authors with the same name

New current-mode sense amplifiers for high density DRAM and PIM architectures., , , , and . ISCAS (4), page 938-941. IEEE, (2001)SRAM Cell with Data-Aware Power-Gating Write-Asist for Near-Threshold Operation., and . ISCAS, page 1-4. IEEE, (2018)An Energy-Efficient All-Digital Time-Domain-Based CMOS Temperature Sensor for SoC Thermal Management., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 23 (8): 1508-1517 (2015)All-Digital ON-Chip Process Sensor Using Ratioed Inverter-Based Ring Oscillator., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 24 (11): 3232-3242 (2016)Offset-Canceling Current-Sampling Sense Amplifier for Resistive Nonvolatile Memory in 65 nm CMOS., , , , and . IEEE J. Solid State Circuits, 52 (2): 496-504 (2017)Bitline Charge Sharing Suppressed Bitline and Cell Supply Collapse Assists for Energy-Efficient 6T SRAM., , and . IEEE Access, (2021)An Offset-Canceling Triple-Stage Sensing Circuit for Deep Submicrometer STT-RAM., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 22 (7): 1620-1624 (2014)Self-Referenced Single-Ended Resistance Monitoring Write Termination Scheme for STT-RAM Write Energy Reduction., , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 68 (6): 2481-2493 (2021)Process variation tolerant all-digital multiphase DLL for DDR3 interface., , , , , , and . CICC, page 1-4. IEEE, (2010)A 14-nm Low Voltage SRAM with Charge-Recycling and Charge Self-Saving Techniques for Low-Power Applications., , , , , , , , , and . VLSI Technology and Circuits, page 214-215. IEEE, (2022)