( en | de | ru )

 

Disambiguation of "Jung, Seong-Ook"

Author of the publication

copydeleteadd this publication to your clipboard
Offset-Canceling Current-Sampling Sense Amplifier for Resistive Nonvolatile Memory in 65 nm CMOS.

, , , , and . IEEE J. Solid State Circuits, 52 (2): 496-504 (2017)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Seong-Jung Kim

Ki-Chang Seong

Seunghyeon Seong

Hong-Jae Seong

Nak-Hyon Seong

 

Other publications of authors with the same name

MTJ based non-volatile flip-flop in deep submicron technology., , , , , and . ISOCC, page 424-427. IEEE, (2011)An MTJ-based non-volatile flip-flop for high-performance SoC., , , , , and . I. J. Circuit Theory and Applications, 42 (4): 394-406 (2014)SRAM Write Assist Circuit Using Cell Supply Voltage Self-Collapse With Bitline Charge Sharing for Near-Threshold Operation., , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 69 (3): 1567-1571 (2022)Transistor sizing for reliable domino logic design in dual threshold voltage technologies., , and . ACM Great Lakes Symposium on VLSI, page 133-138. ACM, (2001)Pseudo NMOS based sense amplifier for high speed single-ended SRAM., , , , and . ICECS, page 331-334. IEEE, (2014)Bitline Precharging and Preamplifying Switching pMOS for High-Speed Low-Power SRAM., , , , , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 63-II (11): 1059-1063 (2016)SRAM Design for 22-nm ETSOI Technology: Selective Cell Current Boosting and Asymmetric Back-Gate Write-Assist Circuit., , , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 62-I (6): 1538-1545 (2015)Intrinsic Capacitance based Multi bit Computing in Memory., , , and . ISOCC, page 361-362. IEEE, (2021)A Highly Integrated Crosspoint Array Using Self-rectifying FTJ for Dual-mode Operations: CAM and PUF., , , , , , , , , and . ESSCIRC, page 113-116. IEEE, (2022)Thyristor-Based Volatile Memory in Nano-Scale CMOS., , , , , , , and . ISSCC, page 2612-2621. IEEE, (2006)