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An Architectural-Level Reliability Improvement Scheme in STT-MRAM Main Memory.

, , and . Microprocess. Microsystems, (April 2022)

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Memory Mapped SPM: Protecting Instruction Scratchpad Memory in Embedded Systems against Soft Errors., , , and . EDCC, page 218-226. IEEE Computer Society, (2012)Investigating the Effects of Process Variations and System Workloads on Reliability of STT-RAM Caches., , , and . EDCC, page 120-129. IEEE Computer Society, (2016)PenSLR: Persian end-to-end Sign Language Recognition Using Ensembling., , , , , , and . CoRR, (2024)Sleepy-LRU: extending the lifetime of non-volatile caches by reducing activity of age bits., , , and . J. Supercomput., 75 (7): 3945-3974 (2019)LETHOR: a thermal-aware proactive routing algorithm for 3D NoCs with less entrance to hot regions., , , and . J. Supercomput., 78 (6): 8194-8218 (2022)3RSeT: Read Disturbance Rate Reduction in STT-MRAM Caches by Selective Tag Comparison., , and . IEEE Trans. Computers, 71 (6): 1305-1319 (2022)FTSPM: A Fault-Tolerant ScratchPad Memory., , , , and . DSN, page 1-10. IEEE Computer Society, (2013)Data block manipulation for error rate reduction in STT-MRAM based main memory., , and . J. Supercomput., 78 (11): 13342-13372 (2022)An Architectural-Level Reliability Improvement Scheme in STT-MRAM Main Memory., , and . Microprocess. Microsystems, (April 2022)Investigating the effects of process variations and system workloads on endurance of non-volatile caches., , and . DFT, page 1-6. IEEE Computer Society, (2017)