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Disambiguation of "Castellani, Niccolo"

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1S1R Sub-Threshold Operation in Crossbar Arrays for Neural Networks Hardware Implementation.

, , , , , , , , , , , , , , , and . MIXDES, page 1-6. IEEE, (2023)

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Niccolò Tosi

Niccolo Lazzarini

Christopher Castellani

Ottmar Castellani

Xavier Castellani

 

Other publications of authors with the same name

Multilayer Structure in SeAsGeSi-based OTS for High Thermal Stability and Reliability Enhancement., , , , , , , , , and 6 other author(s). ESSDERC, page 225-228. IEEE, (2022)Enhanced Thermal Confinement in Phase-Change Memory Targeting Current Reduction., , , , , , , , , and 3 other author(s). ESSDERC, page 233-236. IEEE, (2022)Synaptic metaplasticity with multi-level memristive devices., , , , , , , and . AICAS, page 1-5. IEEE, (2023)1S1R Sub-Threshold Operation in Crossbar Arrays for Neural Networks Hardware Implementation., , , , , , , , , and 6 other author(s). MIXDES, page 1-6. IEEE, (2023)TCAD modeling of performance and reliability of nano-scale memory devices.. Polytechnic University of Milan, Italy, (2014)Multilevel Programming Reliability in Si-doped GeSbTe for Storage Class Memory., , , , , , , , , and . IRPS, page 1-6. IEEE, (2021)Metal Oxide Resistive Memory (OxRAM) and Phase Change Memory (PCM) as Artificial Synapses in Spiking Neural Networks., , , , , , , , , and . ICECS, page 561-564. IEEE, (2018)High temperature stability embedded ReRAM for 2x nm node and beyond., , , , , , , , , and 9 other author(s). IMW, page 1-4. IEEE, (2022)Innovative GeS2/Sb2Te3 based phase change memory for low power applications., , , , , , , , , and 3 other author(s). NVMTS, page 1-4. IEEE, (2017)16kbit 1T1R OxRAM arrays embedded in 28nm FDSOI technology demonstrating low BER, high endurance, and compatibility with core logic transistors., , , , , , , , , and 20 other author(s). IMW, page 1-4. IEEE, (2021)