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An eDRAM-Based Computing-in-Memory Macro With Full-Valid-Storage and Channel-Wise-Parallelism for Depthwise Neural Network.

X. Qiao, Y. Yang, C. Xue, Y. He, X. Cui, S. Jia, и Y. Wang. IEEE Trans. Circuits Syst. II Express Briefs, 71 (5): 2539-2543 (мая 2024)

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Keqiang Cui

Ai Cui

Yifang Cui

Huiling Cui

Cui Zhou

Другие публикации лиц с тем же именем

A design of high performance full adder with memristors.K. Zhang, X. Cui, и X. Cui. ASICON, стр. 746-479. IEEE, (2017)A high-efficient and accurate fault model aiming at FPGA-based AES cryptographic applications.N. Liao, X. Cui, T. Wang, K. Liao, Y. Ni, D. Yu, и X. Cui. ASICON, стр. 1-4. IEEE, (2015)Employing the mixed FBB/RBB in the design of FinFET logic gates.T. Wang, X. Cui, K. Liao, N. Liao, Y. Ni, D. Yu, и X. Cui. ASICON, стр. 1-4. IEEE, (2015)A Hybrid Spiking Recurrent Neural Network on Hardware for Efficient Emotion Recognition.C. Zou, X. Cui, Y. Kuang, Y. Wang, и X. Wang. AICAS, стр. 332-335. IEEE, (2022)The Synthesis Method of Logic Circuits Based on the NMOS-Like RRAM Gates.X. Cui, Y. Ma, F. Wei, и X. Cui. IEEE Access, (2021)The synthesis method of logic circuits based on the iMemComp gates.X. Cui, Q. Lin, X. Cui, F. Wei, X. Liu, и J. Kang. Integr., (2020)An Area-Efficient and Robust Memristive LUT Based on the Enhanced Scouting Logic Cells.X. Cui, F. Liu, S. Zhang, и X. Cui. ISCAS, стр. 2571-2575. IEEE, (2022)A 28nm 64Kb SRAM based Inference-Training Tri-Mode Computing-in-Memory Macro.N. Pan, X. Cui, X. Qiao, K. Xiao, Q. Guo, и Y. Wang. ISCAS, стр. 2561-2565. IEEE, (2022)An Efficient Spiking Neural Network Accelerator with Sparse Weight.Z. Wang, Y. Zhong, Y. Yang, X. Cui, и Y. Wang. BioCAS, стр. 1-5. IEEE, (2023)The logic obfuscation of LFSR with the crosstalk based polymorphic gate.Y. Sun, X. Cui, Y. Chen, и X. Cui. AsianHOST, стр. 1-6. IEEE, (2021)

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