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Resistive memory device requirements for a neural algorithm accelerator., , , , , , , and . IJCNN, page 929-938. IEEE, (2016)Research Challenges for Energy-Efficient Computing in Automated Vehicles., , , , , , , , , and 5 other author(s). Computer, 56 (3): 47-58 (March 2023)Analog Neural Network Inference Accuracy in One-Selector One-Resistor Memory Arrays., , , , , , , , and . ICRC, page 7-12. IEEE, (2022)Process Variation Model and Analysis for Domain Wall-Magnetic Tunnel Junction Logic., , , , , , and . ISCAS, page 1-5. IEEE, (2020)SHIFFT: A Scalable Hybrid In-Memory Computing FFT Accelerator., , , , , , , and . ISVLSI, page 130-135. IEEE, (2024)Unsupervised Competitive Hardware Learning Rule for Spintronic Clustering Architecture., , , , , , , and . CoRR, (2020)An Analog Preconditioner for Solving Linear Systems., , , , , , , , and . HPCA, page 761-774. IEEE, (2021)Purely Spintronic Leaky Integrate-and-Fire Neurons., , , , , , , and . ISCAS, page 1189-1193. IEEE, (2022)Plasticity-Enhanced Domain-Wall MTJ Neural Networks for Energy-Efficient Online Learning., , , , , , , , and . ISCAS, page 1-5. IEEE, (2020)CMOS-Free Magnetic Domain Wall Leaky Integrate-and-Fire Neurons with Intrinsic Lateral Inhibition., , , , , , , , and . ISCAS, page 1-5. IEEE, (2020)