( en | de | ru )

 

Disambiguation

From post

копироватьудалитьдобавить публикацию в буфер
Low-Power Field-Programmable VLSI Processor Using Dynamic Circuits.

, , и . ISVLSI, стр. 243-248. IEEE Computer Society, (2004)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed.

No persons found for author name Hariyama, Masanori
add a person with the name Hariyama, Masanori
 

Другие публикации лиц с тем же именем

Benchmarks for FPGA-Targeted High-Level-Synthesis., , и . CANDAR, стр. 232-238. IEEE, (2019)Hardware-oriented succinct-data-structure based on block-size-constrained compression., , и . SoCPaR, стр. 136-140. IEEE, (2015)Implementation of an FPGA-Oriented Complex Number Computation Library Using Intel OneAPI DPC++., , и . MWSCAS, стр. 1-4. IEEE, (2022)Low-Power Field-Programmable VLSI Processor Using Dynamic Circuits., , и . ISVLSI, стр. 243-248. IEEE Computer Society, (2004)Non-Volatile Multi-Context FPGAs Using Hybrid Multiple-Valued/Binary Context Switching Signals., , , и . ERSA, стр. 309-310. CSREA Press, (2008)Switch Block Architecture for Multi-Context FPGAs Using Hybrid Multiple-Valued/Binary Context Switching Signals., , и . ISMVL, стр. 17. IEEE Computer Society, (2006)Advanced Devices and Architectures., , и . Principles and Structures of FPGAs, Springer, (2018)Memory Allocation Exploiting Temporal Locality for Reducing Data-Transfer Bottlenecks in Heterogeneous Multicore Processors., , , и . IEEE Trans. Circuits Syst. Video Techn., 21 (10): 1453-1466 (2011)Genetic Approach to Minimizing Energy Consumption of VLSI Processors Using Multiple Supply Voltages., , и . IEEE Trans. Computers, 54 (6): 642-650 (2005)Efficient data transfer scheme using word-pair-encoding-based compression for large-scale text-data processing., , , и . APCCAS, стр. 639-642. IEEE, (2014)