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A 31.3fJ/conversion-step 70.4dB SNDR 30MS/s 1.2V two-step pipelined ADC in 0.13μm CMOS., , и . ISSCC, стр. 474-476. IEEE, (2012)Passive Compensation for Improved Settling and Large Signal Stabilization of Ring Amplifiers., , , , , , , и . ISCAS, стр. 1-5. IEEE, (2018)Cascoded Ring Amplifiers for High Speed and High Accuracy Settling., , , , , и . ISCAS, стр. 1-5. IEEE, (2019)Gm-Free Assisted Opamp Technique for Continuous Time Delta-Sigma Modulators., , , , и . ISCAS, стр. 1-4. IEEE, (2019)An Over-60dB True Rail-to-Rail Performance Using Correlated Level Shifting and an Opamp with 30dB Loop Gain., и . ISSCC, стр. 540-541. IEEE, (2008)Buck-boost switched-capacitor DC-DC voltage regulator using delta-sigma control loop., , , , и . ISCAS (4), стр. 743-746. IEEE, (2002)Mixed-Order Sturdy MASH Delta-Sigma Modulator., , , и . ISCAS, стр. 257-260. IEEE, (2007)Precise area-controlled return-to-zero current steering DAC with reduced sensitivity to clock jitter., и . ISCAS, стр. 297-300. IEEE, (2010)A tunable duty-cycle-controlled switched-R-MOSFET-C CMOS filter for low-voltage and high-linearity applications., , , и . ISCAS (1), стр. 433-436. IEEE, (2004)A 10b Ternary SAR ADC with decision time quantization based redundancy., , , , и . A-SSCC, стр. 65-68. IEEE, (2011)