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DVFS-Based Long-Term Task Scheduling for Dual-Channel Solar-Powered Sensor Nodes.

, , , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 25 (11): 2981-2994 (2017)

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Low Clock Swing D Flip-Flops Design by Using Output Control and MTCMOS., , and . PATMOS, volume 4148 of Lecture Notes in Computer Science, page 486-495. Springer, (2006)Design of multi-stage latency adders using detection and sequence-dependence between successive calculations., , , , and . ISCAS, page 998-1001. IEEE, (2014)Design Methodology for Thin-Film Transistor Based Pseudo-CMOS Logic Array with Multi-Layer Interconnect Architecture., , , , , , and . DAC, page 80:1-80:6. ACM, (2017)Deadline-aware task scheduling for solar-powered nonvolatile sensor nodes with global energy migration., , , , , , and . DAC, page 126:1-126:6. ACM, (2015)Fine-grain Sleep Transistor Placement Considering Leakage Feedback Gate., , and . APCCAS, page 964-967. IEEE, (2006)An 8b 0.8kS/s configurable VCO-based ADC using oxide TFTs with Inkjet printing interconnection., , , , , , , and . ISCAS, page 1-4. IEEE, (2017)Mini-step Strategy for Transient Analysis, and . CoRR, (2011)Low Bit-Width Convolutional Neural Network on RRAM., , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 39 (7): 1414-1427 (2020)Gibbon: An Efficient Co-Exploration Framework of NN Model and Processing-In-Memory Architecture., , , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 42 (11): 4075-4089 (November 2023)RRAM-Based Analog Approximate Computing., , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 34 (12): 1905-1917 (2015)