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A Bitstream Relocation Technique to Improve Flexibility of Partial Reconfiguration.

, , , , и . ICA3PP (1), том 7439 из Lecture Notes in Computer Science, стр. 139-152. Springer, (2012)

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Ieva Stupp-Kuga

 

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Power-aware FPGA routing fabrics and design tools., , , , , and . VLSI-SoC, page 67-72. IEEE, (2010)EXPRESS-1: a dynamically reconfigurable platform using embedded processor FPGA., , , , , and . FPT, page 209-216. IEEE, (2004)Blokus Duo engine on a Zynq., , , , , and . FPT, page 374-377. IEEE, (2014)hCODE: An open-source platform for FPGA accelerators., , , , , and . FPT, page 205-208. IEEE, (2016)A novel physical defects recovery technique for FPGA-IP cores., , , , , and . ReConFig, page 1-7. IEEE, (2012)Fault Recovery Technique for TMR Softcore Processor System Using Partial Reconfiguration., , , , , , and . ICA3PP (1), volume 7439 of Lecture Notes in Computer Science, page 392-404. Springer, (2012)A Bitstream Relocation Technique to Improve Flexibility of Partial Reconfiguration., , , , and . ICA3PP (1), volume 7439 of Lecture Notes in Computer Science, page 139-152. Springer, (2012)An automatic FPGA design and implementation framework., , , , and . FPL, page 1-4. IEEE, (2013)A logic cell architecture exploiting the shannon expansion for the reduction of configuration memory., , , , , and . FPL, page 1-6. IEEE, (2014)High-level Synthesis based on Parallel Design Patterns using a Functional Language., , , , and . HEART, page 23:1-23:6. ACM, (2017)