Author of the publication

APDL: A Processor Description Language For Design Space Exploration of Embedded Processors.

, , , and . FDL, page 50-55. ECSI, (2007)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

High Level Synthesis of Degradable ASICs Using Virtual Binding., , , , and . VTS, page 311-317. IEEE Computer Society, (2007)Programmable Routing Tables for Degradable Torus-Based Networks on Chips., , and . ISCAS, page 1065-1068. IEEE, (2007)Power efficient sequential multiplication using pre-computation., , , and . ISCAS, IEEE, (2006)Record and deterministic replay of parallel programs on multiprocessors. University of Illinois Urbana-Champaign, USA, (2014)RelaxReplay: record and replay for relaxed-consistency multiprocessors., and . ASPLOS, page 223-238. ACM, (2014)Asymmetric Memory Fences: Optimizing Both Performance and Implementability., , and . ASPLOS, page 531-543. ACM, (2015)Safe nondeterminism in a deterministic-by-default parallel language., , , , , , and . POPL, page 535-548. ACM, (2011)Low Power Combinational Multipliers using Data-driven Signal Gating., and . APCCAS, page 1430-1433. IEEE, (2006)Record-Replay Architecture as a General Security Framework., , , , and . HPCA, page 180-193. IEEE Computer Society, (2018)APDL: A Processor Description Language For Design Space Exploration of Embedded Processors., , , and . FDL, page 50-55. ECSI, (2007)