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Disambiguation of "Saluja, Kewal K."

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Testing Flash Memories for Tunnel Oxide Defects.

, and . VLSI Design, page 157-162. IEEE Computer Society, (2008)

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Heinz Kewald

Kewal Krishen Mehta

Aman K K Bhasin

K Böhm

K Schweizerhof

 

Other publications of authors with the same name

Optimal Sensor Distribution for Maximum Exposure in A Region with Obstacles., , and . GLOBECOM, IEEE, (2006)Calibrating On-chip Thermal Sensors in Integrated Circuits: A Design-for-Calibration Approach., , and . J. Electron. Test., 27 (6): 711-721 (2011)Diagnosing At-Speed Scan BIST Circuits Using a Low Speed and Low Memory Tester., , , and . IEEE Trans. Very Large Scale Integr. Syst., 15 (7): 790-800 (2007)A Novel ATPG Method for Capture Power Reduction during Scan Testing., , , , , , and . IEICE Trans. Inf. Syst., 90-D (9): 1398-1405 (2007)A Study of Capture-Safe Test Generation Flow for At-Speed Testing., , , , , , , , , and 1 other author(s). IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 93-A (7): 1309-1318 (2010)A Novel Approach for Testing Memories Using a Built-In Self Testing Technique., and . ITC, page 830-839. IEEE Computer Society, (1986)A low cost approach to calibrate on-chip thermal sensors., , , , and . ISQED, page 572-576. IEEE, (2011)Transient Fault Resilient QR Factorization on GPUs., , and . FTXS@HPDC, page 63-70. ACM, (2015)Identifying high variability speed-limiting paths under aging., , , and . LATS, page 1-6. IEEE, (2017)Fault Tolerant Lanczos Eigensolver via an Invariant Checking Method., , and . J. Electron. Test., 37 (3): 409-422 (2021)