Author of the publication

On Optimizations of Edge-Valued MDDs for Fast Analysis of Multi-State Systems.

, , , , and . IEICE Trans. Inf. Syst., 97-D (9): 2234-2242 (2014)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Cascade Realization of 3-Input 3-Output Conservative Logic Circuits., and . IEEE Trans. Computers, 27 (3): 214-221 (1978)BDD representation for incompletely specifiedvmultiple-output logic functions and its applications to functional decomposition., and . DAC, page 373-378. ACM, (2005)Comparison of Decision Diagrams for Multiple-Output Logic Functions., , and . IWLS, page 379-384. (2002)Decision Diagrams for Discrete Functions: Classification and Unified Interpretation., and . ASP-DAC, page 439-446. IEEE, (1998)Maximally Asymmetric Multiple-Valued Functions., and . ISMVL, page 188-193. IEEE, (2019)Remarks on the Design of First Digital Computers in Japan - Contributions of Yasuo Komamiya., , , and . EUROCAST (1), volume 12013 of Lecture Notes in Computer Science, page 123-130. Springer, (2019)A Balanced Decision Tree Based Heuristic for Linear Decomposition of Index Generation Functions., , and . IEICE Trans. Inf. Syst., 100-D (8): 1583-1591 (2017)A Systematic Design Method for Two-Variable Numeric Function Generators Using Multiple-Valued Decision Diagrams., , and . IEICE Trans. Inf. Syst., 93-D (8): 2059-2067 (2010)Realization of Multi-Terminal Universal Interconnection Networks Using Contact Switches., , , and . IEICE Trans. Inf. Syst., 104-D (8): 1068-1075 (2021)On the Adders with Minimum Tests., and . Asian Test Symposium, page 10-15. IEEE Computer Society, (1997)