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Disambiguation of "Giacomin, Edouard"

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Accelerating Inference on Binary Neural Networks with Digital RRAM Processing.

, , , , , , , and . VLSI-SoC (Selected Papers), volume 586 of IFIP Advances in Information and Communication Technology, page 257-278. Springer, (2019)

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Edouard Lambelet

Édouard Bonnet

Edouard Paklavadjian

Edouard Hugo

Edouard Borel

 

Other publications of authors with the same name

A Novel High-Gain Amplifier Circuit Using Super-Steep-Subthreshold-Slope Field-Effect Transistors., , , and . VLSI-SoC, page 1-6. IEEE, (2021)A 12-pA Resolution Sigma Delta ADC Topology for Chemiresistive Sensor-Based Applications., , and . VLSI-SoC, page 1-6. IEEE, (2021)Low-power multiplexer designs using three-independent-gate field effect transistors., , and . NANOARCH, page 33-38. IEEE, (2017)A Product Engine for Energy-Efficient Execution of Binary Neural Networks Using Resistive Memories., , , , , , , and . VLSI-SoC, page 160-165. IEEE, (2019)Wire-Aware Architecture and Dataflow for CNN Accelerators., , , , , and . MICRO, page 1-13. ACM, (2019)Area-Efficient Multiplier Designs Using a 3D Nanofabric Process Flow., , and . ISCAS, page 1-5. IEEE, (2021)A Study on Switch Block Patterns for Tileable FPGA Routing Architectures., , , and . FPT, page 247-250. IEEE, (2019)OpenFPGA: An Opensource Framework Enabling Rapid Prototyping of Customizable FPGAs., , , , and . FPL, page 367-374. IEEE, (2019)A RRAM-based FPGA for Energy-efficient Edge Computing., , , , and . DATE, page 144-. IEEE, (2020)Physical Design Considerations of One-level RRAM-based Routing Multiplexers., , , and . ISPD, page 47-54. ACM, (2017)