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Disambiguation of "da Costa, Eduardo A. C."

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A new array architecture for signed multiplication using Gray encoded radix-2m operands.

, , and . Integr., 40 (2): 118-132 (2007)

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Afonso da Costa

Alvaro Filipe da Costa

Paulo Eduardo Miranda Costa

Ana Maria Costa Santos Hübner

Raoul Costamagna

 

Other publications of authors with the same name

Exploring Approximate Arithmetic Units for a Power-Efficient Kalman Gain VLSI Design., , , , and . ICECS 2022, page 1-4. IEEE, (2022)Design of a radix-2m hybrid array multiplier using carry save adder format., , , and . SBCCI, page 172-177. ACM, (2005)Minimum number of operations under a general number representation for digital filter synthesis., , , and . ECCTD, page 252-255. IEEE, (2007)Reducing the Hamming distance of encoded FFT twiddle factors using improved heuristic algorithms., , and . LASCAS, page 1-4. IEEE, (2013)Enhancing a HEVC interpolation filter hardware architecture with efficient adder compressors., , , and . NEWCAS, page 1-4. IEEE, (2015)Low power SATD architecture employing multiple sizes Hadamard Transforms and adder compressors., , , , and . NEWCAS, page 277-280. IEEE, (2017)A New Architecture for Signed Radix-2m Pure Array Multipliers., , and . ICCD, page 112-117. IEEE Computer Society, (2002)Optimization of Single-Stage FFT Architectures Using Multiple Constant Multiplication., , , and . SBCCI, page 1-6. IEEE, (2018)Energy-efficient Gaussian filter for image processing using approximate adder circuits., , , and . ICECS, page 450-453. IEEE, (2015)Optimizing Iterative-based Dividers for an Efficient Natural Logarithm Operator Design., , , , and . LASCAS, page 1-4. IEEE, (2020)