( en | de | ru )

 

Disambiguation of "Jeong, Byunghoon"

Author of the publication

copydeleteadd this publication to your clipboard
A Hybrid ZQ Calibration Design for High-Density Flash Memory Toggle 5.0 High-speed Interface.

, , , , , , , , , , , , and . A-SSCC, page 1-2. IEEE, (2021)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Su-Jeong Jeong

Wonrae Jeong

Hang-Kyun Jeong

Hyung-Gon Jeong

Chang-Kyo Jeong

 

Other publications of authors with the same name

A 1.8-Gb/s/Pin 16-Tb NAND Flash Memory Multi-Chip Package With F-Chip for High-Performance and High-Capacity Storage., , , , , , , , , and 12 other author(s). IEEE J. Solid State Circuits, 56 (4): 1129-1140 (2021)A 512Gb 3b/Cell 7th -Generation 3D-NAND Flash Memory with 184MB/s Write Throughput and 2.0Gb/s Interface., , , , , , , , , and 34 other author(s). ISSCC, page 426-428. IEEE, (2021)7.5 A 128Gb 2b/cell NAND flash memory in 14nm technology with tPROG=640µs and 800MB/s I/O rate., , , , , , , , , and 35 other author(s). ISSCC, page 138-139. IEEE, (2016)A Hybrid ZQ Calibration Design for High-Density Flash Memory Toggle 5.0 High-speed Interface., , , , , , , , , and 3 other author(s). A-SSCC, page 1-2. IEEE, (2021)11.4 A 512Gb 3b/cell 64-stacked WL 3D V-NAND flash memory., , , , , , , , , and 34 other author(s). ISSCC, page 202-203. IEEE, (2017)A 1Tb 3b/Cell 8th-Generation 3D-NAND Flash Memory with 164MB/s Write Throughput and a 2.4Gb/s Interface., , , , , , , , , and 24 other author(s). ISSCC, page 136-137. IEEE, (2022)A 1.8 Gb/s/pin 16Tb NAND Flash Memory Multi-Chip Package with F-Chip of Toggle 4.0 Specification for High Performance and High Capacity Storage Systems., , , , , , , , , and 16 other author(s). VLSI Circuits, page 1-2. IEEE, (2020)