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Live Demonstration: SRAM Compute-In-Memory Based Visual & Aural Recognition System.

, , , , , , , , and . AICAS, page 1-2. IEEE, (2023)

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Layout dependent BTI and HCI degradation in nano CMOS technology: A new time-dependent LDE and impacts on circuit at end of life., , and . ICICDT, page 1-3. IEEE, (2016)Live Demonstration: SRAM Compute-In-Memory Based Visual & Aural Recognition System., , , , , , , , and . AICAS, page 1-2. IEEE, (2023)A 77μW 115dB-Dynamic-Range 586fA-Sensitivity Current-Domain Continuous-Time Zoom ADC with Pulse-Width-Modulated Resistor DAC and Background Offset Compensation Scheme., , , , , , , and . CICC, page 1-2. IEEE, (2022)Compact modeling and simulation of accelerated circuit aging., , , , , , and . CICC, page 1-4. IEEE, (2018)OMI/TMI-based Modeling and Fast Simulation of Random Telegraph Noise (RTN) in Advanced Logic Devices and Circuits., , , , , , and . ASICON, page 1-4. IEEE, (2019)Realization of Nanoscale Neuromorphic Memristor Array with Low Power Consumption., , , , , , , and . ASICON, page 1-4. IEEE, (2019)Investigation of Hot Carrier Enhanced Body Bias Effect in Advanced FinFET Technology., , , , , , , , and . IRPS, page 1-6. IEEE, (2023)New insights into the HCI degradation of pass-gate transistor in advanced FinFET technology., , , , , , , , , and 3 other author(s). IRPS, page 3-1. IEEE, (2018)Evaluation of SRAM Vmin shift induced by random telegraph noise (RTN): physical understanding and prediction method., , , , , and . ISCAS, page 1-4. IEEE, (2018)DeePEB: A Neural Partial Differential Equation Solver for Post Exposure Baking Simulation in Lithography., , , , and . ICCAD, page 122:1-122:9. ACM, (2022)