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A 2Mb ReRAM with two bits error correction codes circuit for high reliability application., , , , , , и . ASICON, стр. 1-4. IEEE, (2013)A 9Mb HZO-Based Embedded FeRAM with 1012-Cycle Endurance and 5/7ns Read/Write using ECC-Assisted Data Refresh and Offset-Canceled Sense Amplifier., , , , , , , , , и 2 other автор(ы). ISSCC, стр. 498-499. IEEE, (2023)Novel 15T SRAM Cell for Low Voltage High Reliability Application., , , , , , , и . ASICON, стр. 1-4. IEEE, (2021)Nonvolatile Binary CNN Accelerator with Extremely Low Standby Power using RRAM for IoT Applications., , , , и . ASICON, стр. 1-4. IEEE, (2019)A Logic Resistive Memory Chip for Embedded Key Storage With Physical Security., , , , , , и . IEEE Trans. Circuits Syst. II Express Briefs, 63-II (4): 336-340 (2016)Arbitrary Style Transfer via Learning to Paint in the Feature Domain., , , , , , и . ASICON, стр. 1-4. IEEE, (2021)Algorithm/Hardware Co-Design Configurable SAR ADC with Low Power for Computing-in-Memory in 28nm CMOS., , и . ASICON, стр. 1-4. IEEE, (2021)SET Tolerable SRAM Hardened by DMR Circuit With Feedback-Split-Gate Voter and High-Speed Hierarchical Structure., , , , , и . IEEE Trans. Circuits Syst. II Express Briefs, 71 (3): 1416-1420 (марта 2024)Branch and Bound for Sigmoid-Like Neural Network Verification., и . ICFEM, том 14308 из Lecture Notes in Computer Science, стр. 137-155. Springer, (2023)ReRAM write circuit with dynamic uniform and small overshoot compliance current under PVT variations., , , , , и . ASICON, стр. 16-19. IEEE, (2017)