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Disambiguation of "Conti, Francesco"

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PULP-TrainLib: Enabling On-Device Training for RISC-V Multi-core MCUs Through Performance-Driven Autotuning.

, , , , , and . SAMOS, volume 13511 of Lecture Notes in Computer Science, page 200-216. Springer, (2022)

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Francesco Conti

Andrea Conti

Luisa Conti

Maria Conti

Christian Conti

 

Other publications of authors with the same name

PULP-NN: A Computing Library for Quantized Neural Network inference at the edge on RISC-V Based Parallel Ultra Low Power Clusters., , , , and . ICECS, page 33-36. IEEE, (2019)XpulpNN: Accelerating Quantized Neural Networks on RISC-V Processors Through ISA Extensions., , , , and . DATE, page 186-191. IEEE, (2020)Architecture-aware design and implementation of CNN algorithms for embedded inference: the ALOHA project., , , , , , , , , and 9 other author(s). ICM, page 52-55. IEEE, (2018)Online process transformation for polyhedral process networks in shared-memory MPSoCs., , , , and . MECO, page 92-97. IEEE, (2014)Darkside: 2.6GFLOPS, 8.7mW Heterogeneous RISC-V Cluster for Extreme-Edge On-Chip DNN Inference and Training., , , , , , , and . ESSCIRC, page 273-276. IEEE, (2022)XpulpNN: Enabling Energy Efficient and Flexible Inference of Quantized Neural Networks on RISC-V based IoT End Nodes., , , , and . ARITH, page 53. IEEE, (2021)ECHOES: a 200 GOPS/W Frequency Domain SoC with FFT Processor and I2S DSP for Flexible Data Acquisition from Microphone Arrays., , , , , , , and . ISCAS, page 1-5. IEEE, (2023)A 12.4TOPS/W @ 136GOPS AI-IoT System-on-Chip with 16 RISC-V, 2-to-8b Precision-Scalable DNN Acceleration and 30%-Boost Adaptive Body Biasing., , , , , , , , , and 7 other author(s). ISSCC, page 326-327. IEEE, (2023)To Buffer, or Not to Buffer? A Case Study on FFT Accelerators for Ultra-Low-Power Multicore Clusters., , and . ASAP, page 1-8. IEEE, (2021)Global Monitoring of Hydrological Parameters in Africa by using Both Active and Passive Microwave Sensors., , , , , and . IGARSS (3), page 912-915. IEEE, (2009)