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Disambiguation of "Kuroda, Yasuto"

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2D Sliced Packet Buffer with traffic volume and buffer occupancy adaptation for power saving.

, , , , , , and . CCNC, page 97-105. IEEE, (2013)

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Yasuto Maruoka

Toshio Kuroda

Susumu Kuroda

Michelle Kuroda

 

Other publications of authors with the same name

A 200Msps, 0.6W eDRAM-based search engine applying full-route capacity dedicated FIB application., , , , , and . CICC, page 1-4. IEEE, (2012)Deterministic High Density Packet-Buffer System for Low Cost Network Systems., , , , , and . AINA, page 951-956. IEEE Computer Society, (2012)Development of onboard LPM-based header processing and reactive link selection for optical packet and circuit integrated networks., , , , , , and . ICC, page 3277-3282. IEEE, (2014)CAM-based VLSI architecture for Huffman coding with real-time optimization of the code word table image coding example., , , , , , , and . ISCAS (5), page 5202-5205. IEEE, (2005)Efficient Vertical/Horizontal-Space 1D-DCT Processing Based on Massive-Parallel Matrix-Processing Engine., , , , , , , and . ISCAS, page 525-528. IEEE, (2007)Demonstrating 100 Gbps optical packet switching using 16-bit longest prefix matching forwarding engine., , , and . ONDM, page 104-109. IEEE, (2015)Hardware implementation of fast forwarding engine using standard memory and dedicated circuit., , , , , and . ICECS, page 379-382. IEEE, (2010)A slice structure using the management of network traffic prediction for green IT., , , , , and . HPSR, page 250-255. IEEE, (2012)Acceleration of DCT Processing with Massive-Parallel Memory-Embedded SIMD Matrix Processor., , , , , , , , and . IEICE Trans. Inf. Syst., 90-D (8): 1312-1315 (2007)Real-Time Huffman Encoder with Pipelined CAM-Based Data Path and Code-Word-Table Optimizer., , , , , , , , and . IEICE Trans. Inf. Syst., 90-D (1): 334-345 (2007)