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Parallel statistical capacitance extraction of on-chip interconnects with an improved geometric variation model.

, , and . ASP-DAC, page 67-72. IEEE, (2011)

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An Efficient Method for Chip-Level Statistical Capacitance Extraction Considering Process Variations with Spatial Correlation., , , , , and . DATE, page 580-585. ACM, (2008)Bayesian model fusion: large-scale performance modeling of analog and mixed-signal circuits by reusing early-stage data., , , , and . DAC, page 64:1-64:6. ACM, (2013)Large-scale statistical performance modeling of analog and mixed-signal circuits., , and . CICC, page 1-8. IEEE, (2012)IC Spatial Variation Modeling: Algorithms and Applications.. Carnegie Mellon University, USA, (2012)Automatic clustering of wafer spatial signatures., , , , and . DAC, page 71:1-71:6. ACM, (2013)Efficient parametric yield estimation of analog/mixed-signal circuits via Bayesian model fusion., , , , and . ICCAD, page 627-634. ACM, (2012)Attention Routing: track-assignment detailed routing using attention-based reinforcement learning., , , , , , , and . CoRR, (2020)Virtual Probe: A Statistical Framework for Low-Cost Silicon Characterization of Nanoscale Integrated Circuits., , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 30 (12): 1814-1827 (2011)Variational capacitance extraction of on-chip interconnects based on continuous surface model., , and . DAC, page 758-763. ACM, (2009)A dynamic method for efficient random mismatch characterization of standard cells., , , , , , and . ICCAD, page 180-186. ACM, (2012)